This invention relates generally to integrated circuits, and more particularly to a system and method of forming a via through dielectric material overlying a copper conductor in an integrated circuit.
Electrically conductive interconnects, used in the fabrication of integrated circuits and semiconductors, are an area of ongoing research. There is a need for interconnects and vias to have both low resistivity, and the ability to withstand volatile process environments. Aluminum and tungsten metals are often used in the production of integrated circuits for making interconnections or vias between electrically active areas. These metals are popular because they are easy to use in a production environment, unlike copper which requires special handling. Aluminum has a fairly good resistivity, approximately 2.65 .mu..OMEGA. cm. Aluminum oxides which are unintentionally formed in processing prevent good electrical connections, but are relatively easy to remove. Tungsten has a higher resistivity at approximately 6 .mu..OMEGA. cm, however, tungsten has advantages which makes its use desirable. These advantages include resistant to electromigration, or the ability maintain its electromechanical integrity, and also resistance to diffusion into surrounding materials. Further information about the relative merits of metals used in integrated circuits is found in, Mark J. Hampden-Smith and Tovia T. Kodas of University of New Mexico, "Copper Etching: New Chemical Approaches", MRS Bulletin, Feb. 23, 1993, pg. 2.
Copper has very good resistance to electromigration, approximately tens times better than aluminum. In addition, copper has extremely low resistivity at approximately 1.67 .mu..OMEGA. cm. One problem with copper is that it oxidizes easily, and the oxide is difficult to remove. Oxidized copper surfaces prevent reliable connections from being made with other conductors, and so oxidation interferes with electrical conductivity. As the complexity of integrated circuits (ICs) increases, so do the number of process steps, and the potential for unintentionally oxidizing connection surfaces. Therefore, despite copper's excellent electrical characteristics, it is infrequently used in the fabrication of integrated circuit interconnects.
The formation of multilayered, compact, integrated circuits with interconnecting vias requires anisotropic etching techniques. Anisotropic etching is directional so that the etching, or removal of material, is propagated in one direction, say the z axis, and not in the other directions, the x and y axes. Anisotropic etching allows for the formation of narrow, steep sided, wells and cylindrical vias between dielectric layers of an IC in a production environment. These vias are often used for interconnects between components at different layers of the IC.
One commercially prevalent form of anisotropic etching is the plasma etch. Plasma etching is performed in a chamber where an atmosphere of a relatively inert gas is introduced. The pressure of the gas and pump rates are controlled. A voltage across the chamber, at a predetermined frequency, is created to establish a flow of ions in a known direction. In addition, the temperature of the chamber, and the time of exposure to the ion flow, are controlled. As a consequence of the radio frequency voltage in the chamber, the relatively inert gas is transformed into a plasma consisting of ions and radicals. The ions and radicals react with the film layers on the IC wafer to form volatile etch products which perform the etching function on selected areas of the IC.
Oxygen is introduced in many plasma etch processes to help create the volatile etch product. One problem with the use of oxygen is that it promotes the oxidation of many metals. Tungsten is a popular interconnect material because it is relatively difficult to oxidize. Aluminum, although easily oxidized, is relatively easy to clean with standard solvents and etch techniques. Copper is also easily oxidized, and the oxides formed by copper are difficult to remove in an IC production environment. Therefore, even though copper's low resistivity makes it an attractive interconnect material, copper has been difficult to use in commercial integrated circuit fabrication where plasma etching, and other processes using oxygen, are common.
The development of smaller, and more densely constructed, integrated circuits necessitates the use of smaller interconnects and vias. The conductivity of the interconnects is reduced as the surface area of the interconnect is reduced, and the resulting increase in interconnect resistivity has become an obstacle in IC design. Conductors having high resistivity create conduction paths with high impedance and large propagation delays. These problems result in unreliable signal timing, unreliable voltage levels, and lengthy signal delays between components in the IC. Propagation discontinuities also result from intersecting conduction surfaces that are poorly connected, or from the joining of conductors having highly different resistivity characteristics. The size of interconnects can be halved by switching from aluminum to copper. Therefore, to meet he need for smaller interconnects, the search continues for a way to use metals, such as copper, in a way that promotes clean electrical connections.
It would be advantageous to employ a method of using copper as a low resistivity material in an interconnect or via between conductors on different layers of an integrated circuit.
It would also be advantageous if the formation of copper oxides could be prevented where copper is used in the fabrication of integrated circuits, and especially within integrated circuit via interconnects, where plasma etching, and other etching techniques using oxygen, are common.
It would also be advantageous if copper could be protected from oxidation with an insulator during processes that promote oxidation, with the insulator being easily removable at a later stage of IC processing. It would be advantageous if the copper insulator could be part of, or processed with, the dielectric films normally used to isolate electrically active sections in IC production.
Accordingly, in an integrated circuit, a method has been provided of connecting an electrical conductor to a connection surface of a copper conductor. The method comprises the step of depositing a multilayered dielectric material on the connection surface of the copper conductor, the multi-layered dielectric including first and second dielectric layers which are selectively etchable, with the first layer including nitride, the first layer located adjacent the connection surface, and the second layer extending over the first layer. The method also comprises the step of removing a portion of the second layer to form a via for an electrical conductor, the via extending to, but not through, the first layer. The method comprises the step of removing the remaining material in the via, including the first layer, to create a via, common to both the first and second layers, extending to the connection surface, whereby the connection surface is exposed to permit a connection to an electrical conductor through the via.
In a preferred form of the present invention, a method is provided for using an etchant to remove the second dielectric layer. A suitable etchant is an anisotropic plasma etch. The dielectric material of the second layer is selected, preferably, from a group consisting of tetraethyl orthosilicate (TEOS) oxide, silane, boron nitride (BN), and silicon dioxide.
An integrated circuit has also been provided comprising a copper conductor having a connection surface where an electrical connection is made to another conductor. The integrated circuit comprises a multilayered dielectric material deposited on the connection surface of the copper conductor, the multilayered dielectric including first and second dielectric layers having selective etchability, the first dielectric layer including nitride and located adjacent the connection surface, and the second dielectric layer extending over the first layer. The first and second layers have a common aperture therethrough to define a via extending to the connection surface for receiving the other conductor, whereby the nitride of the first layer protects the connection surface from oxidation during the creation of the via.
In a preferred form of the invention, the nitride layer is a thin film in the range of about 100 to 300 .ANG.. The nitride film is selected, preferably, from a group consisting of silicon nitride and boron nitride.